1. Field of the Invention
The present invention relates generally to a complementary metal oxide semiconductor (CMOS) sensor and a method for manufacturing the same. More particularly, the invention relates to a CMOS sensor having an inner lens located in a planarized insulation layer thereof and a method of manufacturing the same.
A claim of priority is made to Korean Patent Application No. 10-2004-0072819 filed on Sep. 11, 2004, the disclosure of which is hereby incorporated by reference in its entirety.
2. Description of the Related Art
Complementary metal oxide semiconductor (CMOS) image sensors are commonly used in various digital imaging applications such as digital cameras and the like. A typical CMOS image sensor includes a light sensing block receiving incident light and a logic block converting the incident light into electrical signals.
CMOS image sensors provide various advantages over competing digital imaging technologies. For example, CMOS image sensors are relatively power efficient and they are readily integrated with other devices on a single chip.
In recent years, CMOS image sensor technology has improved in a number of ways. For example, the optical sensitivity of CMOS image sensors has been improved by increasing a fill factor thereof. Fill factor is a ratio representing the relative amount of a CMOS image sensor occupied by the light sensing block. The fill factor is generally limited by the amount of space on the sensor occupied by the logic block. Hence, the fill factor can be increased by reducing the size of the logic block.
Although the typical size of the logic block in CMOS image sensors has decreased over the years, the corresponding increase in optical sensitivity has been somewhat limited by a corresponding increase in the resolution of the CMOS image sensors. In other words, although the logic blocks have become smaller, modern devices now incorporate more of the logic blocks. As a result, additional measures are needed to improve the optical sensitivity of the CMOS image sensors.
One way to improve the optical sensitivity of a CMOS image sensor includes placing a micro lens on the light sensing block to concentrate incident light thereon. One problem with the micro lens, however, is that its effectiveness is limited by properties of an optical path between the micro lens and the light sensing block.
Various devices and methods have been introduced to improve the concentration of incident light on the light sensing block through the micro lens. Many of these techniques have focused on modifying the optical path between the micro lens and a photodiode in the image sensing block. For example, a dual lens structure is disclosed in U.S. Pat. No. 5,796,154 and a semiconductor array imaging device is disclosed in U.S. Pat. No. 6,171,885. Unfortunately, the above mentioned conventional devices require complicated and expensive fabrication processes.
In order to overcome at least these problems, new CMOS image sensors providing improved optical sensitivity and associated methods of manufacture are needed.